Publications

Neuromorphic Device Lab

Publications

2024

  • Yuan, K., …, Ang, D.S. and Gu, C., 2024. A WOx/MoOx hybrid oxide based SERS FET and investigation on its tunable SERS performance. Physical Chemistry Chemical Physics, 26(14), pp.10814-10823. doi: 10.1039/D4CP00641K

2023

  • Li, Jiayi, Haider Abbas, Diing Shenp Ang, Asif Ali, and Xin Ju. Emerging Memristive Artificial Neuron and Synapse Devices for the Neuromorphic Electronics Era. Nanoscale Horizons (2023). doi: 10.1039/D3NH00180F

  • Xu, Y., Chen, R., Jiang, S., Zhou, L., Jiang, T., Gu, C., Ang, D. S., Petti, L., Zhang, Q., Shen, X., Han, J., & Zhou, J. (2023). Insights into the Semiconductor SERS Activity: The Impact of the Defect-Induced Energy Band Offset and Electron Lifetime Change. ACS Applied Materials & Interfaces. doi: 10.1021/acsami.3c06363

  • Asif Ali, Haider Abbas, Jiayi Li, Diing Shenp Ang; GeS conducting-bridge resistive memory device with IGZO buffer layer for highly uniform and repeatable switching. Appl. Phys. Lett. 15 May 2023; 122 (20): 203503. doi: 10.1063/5.0149760

  • Abbas, H.*, Ali, A., Li, J., Tun, T. T. T. & Ang, D. S.* Forming-free, Self-compliance WTe2-based Conductive Bridge RAM with Highly Uniform Multilevel Switching for High-density Memory. IEEE Electron Device Letters, vol. 44, no. 2, pp. 253-256, Feb. 2023, doi: 10.1109/LED.2022.3231646

  • Huang, X., Wang, F., Ma, L., Wang, J., Zhang, T., Hao, X., … & Ang, D. S. (2023). Reversion of catalyst valence states for highly efficient water oxidation. Catalysis Science & Technology.

2022

  • Abbas, H., Li, J. & Ang, D. S. Conductive Bridge Random Access Memory (CBRAM): Challenges and Opportunities for Memory and Neuromorphic Computing Applications. Micromachines 13, 725, doi:10.3390/mi13050725 (2022).[invited]

  • X. Ju and D. S. Ang, “Synapse and Tunable Leaky-Integrate Neuron Functions Enabled by Oxide Trapping Dynamics in a Single Logic Transistor,” in IEEE Electron Device Letters, vol. 43, no. 5, pp. 793-796, May 2022, doi: 10.1109/LED.2022.3162639.

2021

  • Dan Berco and D. S. Ang . (2021) . Multideck light-induced reset in a transparent bilayer synaptic device. Journal of Vacuum Science & Technology B 39, 053202. doi.org/10.1116/6.0001186

  • Berco, D. and D. S. Ang . (2021) . Bioinspired Robotic Vision with Online Learning Capability and Rotation-Invariant Properties. Adv. Intell. Syst., 3: 2100025. 10.1002/aisy.202100025

  • Xie, H., Guo, Q., Chen, L., Zhang, Y., Ma, Y., Wu, M., … & Ang, D. S. (2021). 1D Ti-based H2Ti12O25 nanorod@ 2D RGO sheet composite as high-power anode for long-life Li-ion battery. Journal of Alloys and Compounds, 869, 159223.

  • Xu, Y., Lai, K., Gu, C., Jiang, T., Shen, X., Zeng, S., Ho, A.H., Ang, D.S. and Zhou, J. (2021), Electrical Tuning of MoOx/Ag Hybrids and Investigation of their Surface-Enhanced Raman Scattering Performance. Phys. Status Solidi RRL, 15: 2000499. pssr.202000499

2020

  • Kumar, D., Kalaga, P. S., & Ang, D. S. (2020). Visible Light Detection and Memory Capabilities in MgO/HfO₂ Bilayer-Based Transparent Structure for Photograph Sensing. IEEE Transactions on Electron Devices, 67(10), 4274-4280. 10.1109/ted.2020.3014271

  • Ju, X., Ang, D. S., & Gu, C. (2020). Impact of Channel Hot-Hole Stressing on Gate-Oxide Trap’s Emission. IEEE Transactions on Electron Devices, 67(11), 4720-4727. 10.1109/ted.2020.3019982

  • Ju, X., & Ang, D. S. (2020). Alteration of Gate-Oxide Trap Capture/Emission Time Constants by Channel Hot-Carrier Effect in the Metal-Oxide-Semiconductor Field-Effect Transistor. IEEE Access, 8, 14048-14053. 10.1109/access.2020.2966577

  • Ju, X., & Ang, D. S. (2020, 2020-04-01). Gate-Oxide Trapping Enabled Synaptic Logic Transistor. 2020 IEEE International Reliability Physics Symposium (IRPS)

  • Berco, D., Ang, D. S., & Kalaga, P. S. (2020). Programmable Photoelectric Memristor Gates for In Situ Image Compression. Advanced Intelligent Systems, 2(9), 2000079. 10.1002/aisy.202000079

  • Duan, T., Xu, K., Liu, Z., Gu, C., Pan, J., Ang, D. S., Zhang, R., Wang, Y., & Ma, X. (2020). A novel fabrication technique for three-dimensional concave nanolens arrays. Journal of Materiomics, 6. 10.1016/j.jmat.2020.04.003

  • Duan, T., Gu, C., Ang, D. S., Xu, K., & Liu, Z. (2020). A novel fabrication technique for high-aspect-ratio nanopillar arrays for SERS application. RSC Advances, 10(73), 45037-45041. 10.1039/d0ra09145f

  • Berco, D., Ang, D. S., & Zhang, H. Z. (2020). An Optoneuronic Device with Realistic Retinal Expressions for Bioinspired Machine Vision. Advanced Intelligent Systems, 2(2), 1900115. 10.1002/aisy.201900115

  • Berco, D., Ang, D. S., & Kalaga, P. S. (2020). Programmable Photoelectric Memristor Gates for In Situ Image Compression. Advanced Intelligent Systems, 2(9), 2000079. 10.1002/aisy.202000079

  • Berco, D., & Ang, D. S. (2020). Analysis of large bandgap dielectrics by dual plasmon-photon excitation. Journal of Physics D: Applied Physics, 53(25), 25LT02.

  • Niu, Z., Zhou, C., Wang, J., Xu, Y., Gu, C., Jiang, T., Zeng, S., Zhang, Y., Ang, D. S., & Zhou, J. (2020). UV-light-assisted preparation of MoO3−x/Ag NPs film and investigation on the SERS performance. Journal of Materials Science, 55(21), 8868-8880. 10.1007/s10853-020-04669-5

  • Kalaga, P. S., Kumar, D., Ang, D. S., & Tsakadze, Z. (2020). Highly Transparent ITO/HfO2/ITO Device for Visible-Light Sensing. IEEE Access, 8, 91648-91652. 10.1109/access.2020.2994383

  • Ju, X., & Ang, D. S. (2020). Alteration of Gate-Oxide Trap Capture/Emission Time Constants by Channel Hot-Carrier Effect in the Metal-Oxide-Semiconductor Field-Effect Transistor. IEEE Access, 8, 14048-14053. 10.1109/access.2020.2966577

2019

  • Zhou, C., Sun, L., Zhang, F., Gu, C., Zeng, S., Jiang, T., Shen, X., Ang, D. S., & Zhou, J. (2019). Electrical Tuning of the SERS Enhancement by Precise Defect Density Control. ACS Applied Materials & Interfaces, 11(37), 34091-34099. 10.1021/acsami.9b10856

  • Zhang, H., Ju, X., Zhou, Y., Gu, C., Pan, J., & Ang, D. S. (2019). Realization of Self-Compliance Resistive Switching Memory via Tailoring Interfacial Oxygen. ACS Applied Materials & Interfaces, 11(44), 41490-41496. 10.1021/acsami.9b11772

  • Ju, X., & Ang, D. S. (2019, 2019-03-01). Impact of Hot-Carrier Stress on Oxide Trap Switching Activity in Nanoscale FETs. 2019 China Semiconductor Technology International Conference (CSTIC).

  • Ju, X., & Ang, D. S. (2019, 2019-03-01). Response of Switching Hole Traps in the Small-Area P-MOSFET Under Channel Hot-Hole Effect. 2019 IEEE International Reliability Physics Symposium (IRPS).

  • Hassan, M. Y., & Ang, D. S. (2019). On-Demand Visible-Light Sensing with Optical Memory Capabilities Based on an Electrical-Breakdown-Triggered Negative Photoconductivity Effect in the Ubiquitous Transparent Hafnia. ACS Applied Materials & Interfaces, 11(45), 42339-42348. 10.1021/acsami.9b13552

  • Gu, C., Zhou, C., Ang, D. S., Ju, X., Gu, R., & Duan, T. (2019). The role of the disordered HfO2 network in the high-κ n-MOSFET shallow electron trapping. Journal of Applied Physics, 125(2), 025705. 10.1063/1.5059381

  • Berco, D., & Shenp Ang, D. (2019). Recent Progress in Synaptic Devices Paving the Way toward an Artificial Cogni‐Retina for Bionic and Machine Vision. Advanced Intelligent Systems, 1(1), 1900003. 10.1002/aisy.201900003

  • Berco, D., & Ang, D. S. (2019). Inducing alternating nanoscale rectification in a dielectric material for bidirectional-trigger artificial synapses. Journal of Vacuum Science & Technology B, 37(6), 061806. 10.1116/1.5123665

  • Ang, D. S., Zhou, Y., Yew, K. S., & Berco, D. (2019). On the area scalability of valence-change memristors for neuromorphic computing. Applied Physics Letters, 115(17), 173501. 10.1063/1.5116270

2018

  • Zhou, Y., Ang, D. S., Kalaga, P. S., & Gollu, S. R. (2018, 2018-03-01). Oxide breakdown path for optical sensing at the nanoscale level. 2018 IEEE International Reliability Physics Symposium (IRPS).

  • Zhou, Y., Ang, D. S., & Kalaga, P. S. (2018). Optically reversible electrical soft-breakdown in wide-bandgap oxides—A factorial study. Journal of Applied Physics, 123(16), 161555. 10.1063/1.5002606

  • Toh, R. T., Parthasarathy, S., Zhang, S., Govindarajan, M., Wong, J. S., Chew, K. W., Andia, L., & Ang, D. S. (2018, 2018-06-01). A CMOS-SOI Power Amplifier Technology using EDNMOS for Sub 6 GHz Wireless Applications. 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC),

  • Toh, R. T., Ang, D. S., Parthasarathy, S., Wong, J. S., Yap, H. K., & Zhang, S. (2018). RF Performance of a Highly Linear Power Amplifier EDNMOS Transistor on Trap-Rich SOI. IEEE Electron Device Letters, 39(9), 1346-1349. 10.1109/led.2018.2855442

  • Kole, A., & Ang, D. S. (2018). First principle investigation of electronic transport properties of the edge shaped graphene-porphine molecular junction device. AIP Advances, 8(8), 085009. 10.1063/1.5037257

  • Kawashima, T., Yew, K. S., Zhou, Y., Ang, D. S., Zhang, H. Z., & Kyuno, K. (2018). Argon-plasma-controlled optical reset in the SiO2/Cu filamentary resistive memory stack. Applied Physics Letters, 112(21), 213505. 10.1063/1.5031053

  • Hassan, M. Y., Zhou, Y., Gu, C., Liu, H., Yang, J. K., & Ang, D. S. (2018). Plasmon-Assisted Zone-Selective Repair of Nanoscale Electrical Breakdown Paths in Metal/Oxide/Metal Structures for Near-Field Optical Sensing. ACS Applied Nano Materials, 1(8), 4340-4350. 10.1021/acsanm.8b01257

  • Duan, T. L., Pan, J. S., Ang, D. S., & Gu, C. J. (2018). Interfacial Chemistry Study of GaN by Trimethylaluminum-Only Cycles and X-ray Photoelectron Spectroscopy. ECS Journal of Solid State Science and Technology, 7(5), P281-P286. 10.1149/2.0251805jss

  • Berco, D., Zhou, Y., Gollu, S. R., Kalaga, P. S., Kole, A., Hassan, M., & Ang, D. S. (2018). Nanoscale Conductive Filament with Alternating Rectification as an Artificial Synapse Building Block. ACS Nano, 12(6), 5946-5955. 10.1021/acsnano.8b02193

2017

  • C. J. Gu, D. S. Ang, Y. Gao, R. Y. Gu, Z. Q. Zhao, and C. Zhu. (2017). A vacancy-interstitial defect pair model for positive-bias temperature stress induced electron trapping transformation in the high-k gate n-MOSFET. IEEE Transactions on Electron Devices, 64(6), TBD.

  • Zhou, Y., Kawashima, T., & Ang, D. S. (2017). TiN-Mediated Multi-Level Negative Photoconductance of the ZrO2 Breakdown Path. IEEE Journal of the Electron Devices Society, 5(3), 188-192. 10.1109/jeds.2017.2678469

  • Zhang, H. Z., Ang, D. S., Zhou, Y., & Wang, X. P. (2017). Enlarged read window in the asymmetric ITO/HfOx/TiN complementary resistive switch. Applied Physics Letters, 111(4), 043501. 10.1063/1.4995252

  • Zhang, H. Z., & Ang, D. S. (2017). Zero temperature coefficient of resistance of the electrical-breakdown path in ultrathin hafnia. Journal of Physics D: Applied Physics, 50(38), 385102. 10.1088/1361-6463/aa7ec0

  • Zhang, H., Ang, D. S., Zhou, Y., & Yew, K. S. (2017, 2017-05-01). Single ITO/HfOx/TiN Complementary Switch with a Wide Read Voltage Window for Selector-Less Crossbar RRAM Application. 2017 IEEE International Memory Workshop (IMW).

  • Kawashima, T., Zhou, Y., Yew, K. S., Zhang, H. Z., & Ang, D. S. (2017, 2017-03-01). Metal-electrode-dependent negative photoconductance response of the nanoscale conducting filament in the SiO2-metal stack. 2017 China Semiconductor Technology International Conference (CSTIC).

  • Kawashima, T., Zhou, Y., Yew, K. S., & Ang, D. S. (2017). Optical reset modulation in the SiO2/Cu conductive-bridge resistive memory stack. Applied Physics Letters, 111(11), 113505. 10.1063/1.5003107

  • Hassan, M. Y., Gollu, S. R., & Ang, D. S. (2017, 2017-11-01). Tunable localized surface plasmon resonance of subwavelength Cu/SiO2/Al plasmonic antenna. 2017 Progress in Electromagnetics Research Symposium - Fall (PIERS - FALL).

  • Gu, C., Ang, D. S., Gao, Y., Gu, R., Zhao, Z., & Zhu, C. (2017). A Vacancy-Interstitial Defect Pair Model for Positive-Bias Temperature Stress-Induced Electron Trapping Transformation in the High-k Gate n-MOSFET. IEEE Transactions on Electron Devices, 64(6), 2505-2511. 10.1109/ted.2017.2694440

2016

  • Zhang, H., Ang, D., Yew, K., & Wang, X. (2016). Observation of Self-Reset During Forming of the TiN/HfOx/TiN Resistive Switching Device. IEEE Electron Device Letters, 1-1. 10.1109/led.2016.2590471

  • Tung, Z. Y., & Ang, D. S. (2016). Impact of Voltage-Accelerated Stress on Hole Trapping at Operating Condition. IEEE Electron Device Letters, 37(5), 644-647. 10.1109/led.2016.2543239

  • A. A. Boo, Z. Y. Tung, and D. S. Ang. (2016). On the correlation between hole-trapping transformation and SILC generation under NBTI stressing. IEEE Electron Device Letters, 37(4), 369-372.

  • Yew, K. S., Ang, D. S., Tang, L. J., & Pan, J. (2016). Study of the electrical and chemical properties of the multistep deposited and two-step (ultraviolet ozone cum rapid thermal) annealed HfO2 gate stack. Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena, 34(1), 011205. 10.1116/1.4936893

  • Tung, Z. Y., & Ang, D. S. (2016, 2016-04-01). Alteration of oxide-trap switching activity at operating condition by voltage-accelerated stressing. 2016 IEEE International Reliability Physics Symposium (IRPS).

  • Toh, R. T., Parthasarathy, S., Sun, T., Zhang, S., Purakh, R. V., Zhu, C. S., Nune, V. S., Wong, J. S., Govindarajan, M., Yoo, Y. K., Chew, K. W., & Ang, D. S. (2016, 2016-12-01). A 300mm foundry HRSOI technology with variable silicon thickness for integrated FEM applications. 2016 IEEE International Electron Devices Meeting (IEDM). 2016 IEDM/10.1109/IEDM.2016.7838031

  • Tham, W. H., Ang, D. S., Bera, L. K., Dolmanan, S. B., Bhat, T. N., Lin, V. K. X., & Tripathy, S. (2016). Comparison of the AlxGa1–xN/GaN Heterostructures Grown on Silicon-on-Insulator and Bulk-Silicon Substrates. IEEE Transactions on Electron Devices, 63(1), 345-352. 10.1109/ted.2015.2501410

  • Tham, W. H., Ang, D. S., Bera, L. K., Dolmanan, S. B., Bhat, T. N., Kajen, R. S., Tan, H. R., Teo, S. L., & Tripathy, S. (2016). Gold-free contacts on AlxGa1-xN/GaN high electron mobility transistor structure grown on a 200-mm diameter Si(111) substrate. Journal of Vacuum Science & Technology B, Nanotechnology and Microelectronics: Materials, Processing, Measurement, and Phenomena, 34(4), 041217. 10.1116/1.4952403

  • Gu, C. J., Ang, D. S., Wang, X. P., Zhao, Z. Q., & Chen, D. (2016). Understanding the Switching Oxide Defect Formation and Recovery on HfOxBased RRAM Device. ECS Journal of Solid State Science and Technology, 5(10), N90-N95. 10.1149/2.0011612jss

  • Duan, T. L., Pan, J. S., & Ang, D. S. (2016). Investigation of Surface Band Bending of Ga-Face GaN by Angle-Resolved X-ray Photoelectron Spectroscopy. ECS Journal of Solid State Science and Technology, 5(9), P514-P517. 10.1149/2.0261609jss

  • Boo, A. A., Tung, Z. Y., & Ang, D. S. (2016). New Observations on the Correlation Between Hole-Trapping Transformation and SILC Generation Under NBTI Stressing. IEEE Electron Device Letters, 37(4), 369-372. 10.1109/led.2016.2531752

Before 2016

  • W. H. Tham*, L. K. Bera, D. S. Ang, S. B. Dolmanan, T. N. Bhat, and S. Tripathy “AlGaN/GaN MIS-HEMTs with a common gold-free metal-stack for source/drain/gate,” IEEE Electron Device Letters, vol. 36, no. 12, pp. 1291-1294, Dec. 2015.

  • Y. Zhou, K. S. Yew#, D. S. Ang, T. Kawashima@, M. K. Bera#, H. Z. Zhang* and G. Bersuker, “White-light-induced disruption of nanoscale conducting filament in hafnia,” Applied Physics Letters, vol. 107, no. 7, art. no. 072017, Aug. 2015.

  • T. L. Duan*, J. S. Pan, and D. S. Ang, “Effect of post-deposition annealing on the interface electronic structure of the Al2O3-capped GaN and GaN/AlGaN/GaN heterostructure,” ECS Journal of Solid State Science and Technology, vol. 4, no. 9, pp. P364-P368, Sep. 2015.

  • T. Kawashima@, K. S. Yew#, Y. Zhou, D. S. Ang, M. K. Bera#, and H. Z. Zhang, “Restoration of post-breakdown gate oxide via white-light illumination,” IEEE Electron Device Letters, vol. 36, no. 8, pp. 748-750, Aug. 2015.

  • H. Z. Zhang, D. S. Ang, C. J. Gu, K. S. Yew#, X. P. Wang, and G. Q. Lo, “Role of interfacial layer on complementary resistive switching in the TiN/HfOx/TiN resistive memory device,” Applied Physics Letters, vol. 105, no. 22, art no. 222106, Dec. 2014.

  • T. L. Duan*, J. S. Pan, and D. S. Ang, “Interfacial chemistry and valence band offset between GaN and Al2O3 studied by X-ray photoelectron spectroscopy,” Applied Physics Letters, vol. 102, no. 20, art. no. 201604, May 2013.

  • T. L. Duan* and D. S. Ang, “Capacitance hysteresis in the high-k/metal gate stack from pulsed measurement,” IEEE Transactions on Electron Devices, vol. 60, no. 4, pp. 1349-1354, Apr. 2013.

  • Y. Gao*, D. S. Ang, G. Bersuker, and C. D. Young, “Electron trap transformation under positive-bias temperature stressing,” IEEE Electron Device Letters, vol. 34, no. 3, pp. 351-353, Mar. 2013.

  • K. S. Yew*, D. S. Ang and L. J. Tang, “A new method for enhancing high-k/metal-gate stack performance and reliability for high-k last integration,” IEEE Electron Device Letters, vol. 34, no. 2, pp. 295-297, Feb. 2013.

  • A. A. Boo* and D. S. Ang, “Evolution of hole trapping in the oxynitride gate P-MOSFET subjected to negative-bias temperature stressing,” IEEE Transactions on Electron Devices, vol. 59, no. 11, pp. 3133-3136, Nov. 2012.

  • K. S. Yew* and D. S. Ang, “Study of the multi-step deposited and UV-Ozone annealed HfZrO gate stack by scanning tunneling microscopy and pulse C-V measurement,” IEEE Transactions on Electron Devices, vol. 59, no. 8, pp. 2268-2272, Aug. 2012.

  • A. A. Boo, D. S. Ang, Z. Q. Teo, and K. C. Leong, “Correlation between oxide trap generation and negative-bias temperature instability,” IEEE Electron Device Letters, vol. 33, no. 4, pp. 486-488, Apr. 2012.

  • T. J. J. Ho, D. S. Ang, A. A. Boo, Z. Q. Teo*, and K. C. Leong, “Are interface state generation and positive oxide charge trapping under negative-bias temperature stressing correlated or coupled?” IEEE Transactions on Electron Devices, vol. 59, no. 4, pp. 1013-1022, Apr. 2012.

  • K. S. Yew*, D. S. Ang, and G. Bersuker, “Bimodal Weibull distribution of metal/high- gate stack TDDB – Insights by scanning tunneling microscopy,” IEEE Electron Device Letters, vol. 33, no. 2, pp. 146-148, Feb. 2012.

  • T. J. J. Ho*, D. S. Ang, and K. C. Leong, “Increased deep-level hole trapping by combined negative-bias temperature and channel hot-hole stress,” IEEE Electron Device Letters, vol. 32, no. 10, pp. 1337-1339, Oct. 2011.

  • K. S. Yew*, D. S. Ang, L. J. Tang, K. Cui^, G. Bersuker, and P. S. Lysaght, “Scanning tunneling microscopy study of the multi-step deposited and annealed HfSiOx gate dielectric,” Journal of the Electrochemical Society, vol. 158, no. 10, pp. H1021-H1026, Aug. 2011.

  • (Invited) D. S. Ang, Z. Q. Teo, T. J. J. Ho, and C. M. Ng, “Reassessing the mechanisms of negative-bias temperature instability by repetitive stress/relaxation experiments,” IEEE Transactions on Device and Materials Reliability, vol. 11, no. 1, pp. 19-34, Mar. 2011.

  • Y. Z. Hu, D. S. Ang, and Z. Q. Teo, “Threshold voltage and mobility extraction by ultrafast switching measurement on NBTI,” IEEE Transactions on Electron Devices, vol. 57, no. 8, pp. 2027-2031, Aug. 2010.

  • Z. Q. Teo*, D. S. Ang, and C. M. Ng, “Separation of hole trapping and interface state generation by ultrafast measurement on dynamic negative-bias temperature instability,” IEEE Electron Device Letters, vol. 31, no. 7, pp. 656-658, Jul. 2010.

  • Z. Q. Teo*, D. S. Ang, and C. M. Ng, “Non-hydrogen-transport characteristics of dynamic negative-bias temperature instability,” IEEE Electron Device Letters, vol. 31, no. 4, pp. 269-271, Apr. 2010.

  • T. J. J. Ho+, D. S. Ang, L. J. Tang, T. W. H. Phua, and C. M. Ng, “Role of nitrogen on the gate length dependence of NBTI,” IEEE Electron Device Letters, vol. 30, no. 7, pp. 772-774, Jul. 2009.

  • D. S. Ang, S. C. S. Lai+, G. A. Du, Z. Q. Teo, T. J. J. Ho+, and Y. Z. Hu*, “Effect of hole-trap distribution on the power-law time exponent of NBTI,” IEEE Electron Device Letters, vol. 30, no. 7, pp. 751-753, Jul. 2009.

  • G. A. Du, D. S. Ang, Z. Q. Teo, and Y. Z. Hu*, “Ultrafast measurement on NBTI,” IEEE Electron Device Letters, vol. 30, no. 3, pp. 275-277, Mar. 2009.

  • D. S. Ang, Y. C. Ong*, S. J. O’Shea, K. L. Pey, K. Kakushima, and H. Iwai, “Study of trap generation in the Sc2O3/La2O3/SiOx gate dielectric stack by scanning tunneling microscopy,” Applied Physics Letters, vol. 93, no. 24, art. no. 242904, Dec. 2008.

  • Y. C. Ong*, D. S. Ang, S. J. O’Shea, K. L. Pey, S. J. Wang, C. H. Tung, and X. Li, “Scanning tunneling microscopy study of nitrogen incorporated HfO2,” Journal of Applied Physics, vol. 104, no. 6, art. no. 064119, Sep. 2008.

  • D. S. Ang, T. W. H. Phua*, and C. H. Ling, “Self-heating induced spatial spread of interface state generation by hot-electron effect: Role of the high-energy tail electron,” IEEE Electron Device Letters, vol. 29, no. 8, pp. 934-937, Aug. 2008.

  • D. S. Ang, Y. C. Ong*, S. J. O’Shea, K. L. Pey, C. H. Tung, T. Kawanago, K. Kakushima, and H. Iwai, “Polarity dependent breakdown of the high-/SiOx gate stack: A phenomenological explanation by scanning tunneling microscopy,” Applied Physics Letters, vol. 92, no. 19, art. no. 192904, May 2008.

  • S. Wang, D. S. Ang, and G. A. Du, “Effect of nitrogen on the frequency dependence of dynamic NBTI induced threshold voltage shift of the ultra-thin oxynitride gate P-MOSFET,” IEEE Electron Device Letters, vol. 29, no. 5, pp. 483-486, May 2008.

  • (Invited) D. S. Ang, S. Wang, G. A. Du, and Y. Z. Hu*, “A consistent deep-level hole trapping model for negative-bias temperature instability,” IEEE Transactions on Device and Materials Reliability, vol. 8, no. 1, pp. 22-34, Mar. 2008.

  • Y. C. Ong*, D. S. Ang, K. L. Pey, Z. R. Wang, S. J. O’Shea, C. H. Tung, T. Kawanago, K. Kakushima, and H. Iwai, “Electronic trap characterization of the Sc2O3/La2O3 high- gate stack by scanning tunneling microscopy,” Applied Physics Letters, vol. 92, no. 2, art. no. 022904, Jan. 2008.

  • Y. C. Ong*, D. S. Ang, K. L. Pey, S. J. O’Shea, K. E. J. Goh, C. Troadec, C. H. Tung, T. Kawanago, K. Kakushima, and H. Iwai, “Bilayer gate dielectric study by scanning tunneling microscopy,” Applied Physics Letters, vol. 91, no. 10, art. no. 102905, Sep. 2007.

  • D. S. Ang and S. Wang*, “Recovery of the NBTI stressed ultra-thin gate P-MOSFET: The role of deep-level hole traps,” IEEE Electron Device Letters, vol. 27, no. 11, pp. 914-916, Nov. 2006.

  • D. S. Ang and S. Wang*, “Insight into the suppressed recovery of the NBTI stressed ultra-thin oxynitride gate P-MOSFET,” IEEE Electron Device Letters, vol. 27, no. 9, pp. 755-758, Sep. 2006.

  • D. S. Ang, “Observation of suppressed interface state relaxation under positive gate biasing of the ultra-thin oxynitride gate P-MOSFET subjected to negative-bias temperature stressing,” IEEE Electron Device Letters, vol. 27, no. 5, pp. 412-415, May 2006.

  • D. S. Ang and S. Wang*, “On the non-Arrhenius behavior of negative-bias temperature instability,” Applied Physics Letters, vol. 88, no. 9, art. no. 093506, Feb. 2006.

  • D. S. Ang, S. Wang*, and C. H. Ling, “Evidence of two distinct degradation mechanisms from temperature dependence of negative bias stressing of the ultra-thin gate P-MOSFET,” IEEE Electron Device Letters, vol. 26, no. 12, pp. 906-908, Dec. 2005.

  • D. S. Ang, H. Liao, T. W. H. Phua, and C. H. Ling, “Evidence for a composite interface state generation mode in the channel hot-electron stressed deep submicrometer N-MOSFET,” IEEE Transactions on Electron Devices, vol. 51, no. 12, pp. 2246-2248, Dec. 2004

  • D. S. Ang and K. L. Pey, “Evidence for two distinct positive trapped charge components in NBTI stressed P-MOSFETs employing ultra-thin CVD silicon nitride gate dielectric,” IEEE Electron Device Letters, vol. 25, no. 9, pp. 637-639, Sep. 2004.

  • D. S. Ang, H. Liao*, and C. H. Ling, “Non-local hot-electron injection as the mechanism for the predominant source-side gate oxide degradation in channel hot-electron stressed deep submicrometer N-MOSFETs,” IEEE Electron Device Letters, vol. 25, no. 6, pp. 417-419, Jun. 2004.

  • D. S. Ang, Z. Lun*, and C. H. Ling, “Generation-recombination noise in the near fully depleted SIMOX SOI N-MOSFET – Physical characteristics and modeling,” IEEE Transactions on Electron Devices, vol. 50, no. 12, pp. 2490-2498, Dec. 2003.

  • D. S. Ang and C. H. Ling, “A reassessment of ac hot-carrier degradation in deep submicrometer LDD N-MOSFET,” IEEE Electron Device Letters, vol. 24, no. 9, pp. 598-600, Sep. 2003.

  • D. S. Ang, T. W. H. Phua, H. Liao, and C. H. Ling, “High-energy tail electrons as the mechanism for the worst-case hot-carrier stress degradation of the deep submicrometer N-MOSFET,” IEEE Electron Device Letters, vol. 24, no. 7, pp. 469-471, Jul. 2003.

  • H. Liao*, D. S. Ang, and C. H. Ling, “A comprehensive study of indium implantation-induced damage in deep submicrometer N-MOSFET – Device characterization and damage assessment,” IEEE Transactions on Electron Devices, vol. 49, no. 12, pp. 2254-2262, Dec. 2002.

  • D. S. Ang, “A new insight into the degradation behavior of the LDD N-MOSFET during dynamic hot-carrier stressing,” IEEE Electron Device Letters, vol. 22, no. 11, pp. 553-555, Nov. 2001.

  • D. S. Ang, Z. Lun*, and C. H. Ling, “Generation-recombination noise in the near fully depleted SIMOX N-MOSFET operating in the linear region,” IEEE Electron Device Letters, vol. 22, no. 11, pp. 545-547, Nov. 2001.

  • Z. Lun*, D. S. Ang, and C. H. Ling, “A novel subthreshold slope technique for the extraction of the buried-oxide interface trap density in the fully depleted SOI MOSFET,” IEEE Electron Device Letters, vol. 21, no. 8, pp. 411-413, Aug. 2000.

  • C. H. Ling, C. H. Ang, and D. S. Ang, “Characterization of leakage current in thin gate oxide subjected to 10 keV x-ray irradiation,” IEEE Transactions on Electron Devices, vol. 47, no. 3, pp. 650-652, Mar. 2000.

  • D. S. Ang and C. H. Ling, “The role of electron traps on the post-stress interface trap generation in hot-carrier stressed p-MOSFET’s,” IEEE Transactions on Electron Devices, vol. 46, no. 4, pp. 738-746, Apr. 1999.

  • D. S. Ang and C. H. Ling, “A new model for the post-stress interface trap generation in hot-carrier stressed p-MOSFET’s,” IEEE Electron Device Letters, vol. 20, no. 3, pp. 135-137, Mar. 1999.

  • D. S. Ang and C. H. Ling, “A comparison of hot-carrier degradation in tungsten polycide gate and poly gate p-MOSFET’s,” IEEE Transactions on Electron Devices, vol. 45, no. 4, pp. 895-903, Apr. 1998.

  • D. S. Ang and C. H. Ling, “A novel experimental technique for the lateral profiling of oxide and interface state charges in hot-hole degraded N-MOSFET’s,” IEEE Electron Device Letters, vol. 19, no. 1, pp. 23-25, Jan. 1998.

  • D. S. Ang and C. H. Ling, “A unified model for the self-limiting hot-carrier degradation in LDD n-MOSFET’s,” IEEE Transactions on Electron Devices, vol. 45, no. 1, pp. 149-159, Jan. 1998.

  • D. S. Ang and C. H. Ling, “A new assessment of the self-limiting hot-carrier degradation in LDD NMOSFET’s by charge pumping measurement,” IEEE Electron Device Letters, vol. 18, no. 6, pp. 299-301, Jun. 1997.

  • C. H. Ling, D. S. Ang and S. E. Tan, “Effects of measurement frequency and temperature anneal on differential gate capacitance spectra observed in hot carrier stressed MOSFET’s,” IEEE Transactions on Electron Devices, vol. 42, no. 8, pp. 1528-1535, Aug. 1995.

  • C. H. Ling, S. E. Tan, and D. S. Ang, “A study of hot carrier degradation in NMOSFET’s by gate capacitance and charge pumping current,” IEEE Transactions on Electron Devices, vol. 42, no. 7, pp. 1321-1328, Jul. 1995.

  • C. H. Ling, L. K. Ah, W. K. Choi, S. E. Tan, and D. S. Ang, “Hot-electron degradation in NMOSFET’s: Results from temperature anneal,” IEEE Transactions on Electron Devices, vol. 41, no. 7, pp.1303-1305, Jul. 1994.

  • Y. H. Tan, K. S. Yew*, K. H. Lee, Y. J. Chang, K.-N. Chen, D. S. Ang, E. Fitzgerald, and C. S. Tan, “Al2O3 interface engineering of germanium epitaxial layer grown directly on silicon,” IEEE Transactions on Electron Devices, vol. 60, no. 1, pp. 56-62, Jan. 2013.

  • C. H. Tung, K. L. Pey, R. Ranjan, L. J. Tang, and D. S. Ang, “Nanometal-oxide-semiconductor field-effect-transistor contact and gate silicide migration during gate dielectric breakdown,” Applied Physics Letters, vol. 89, no. 22, art. no. 221902, Nov. 2006.

  • V. L. Lo, K. L. Pey, W. T. Lim, D. S. Ang, and C. H. Tung, “Study of dopant redistribution at the substrate-source/drain p-n junction of nanoscale MOSFET during progressive breakdown,” IEEE Transactions on Electron Devices, vol. 52, no. 11, pp. 2786-2791, Nov. 2006.

  • V. L. Lo, K. L. Pey, C. H. Tung, D. S. Ang, T. S. Foo, and L. J. Tang, “Percolation resistance evolution during progressive breakdown in narrow MOSFETs,” IEEE Electron Device Letters, vol. 27, no. 5, pp. 396-398, May 2006.

  • R. Ranjan, K. L. Pey, C. H. Tung, D. S. Ang, L. J. Tang, T. Kauerauf, R. Degraeve, G. Groeseneken, S. De Gendt, and L. K. Bera, “Ultrafast progressive breakdown associated with metal-like filament formation of breakdown path in HfO2/TaN/TiN transistor,” Applied Physics Letters., vol. 88, no. 12, art. no. 122907, Mar. 2006.

  • R. Ranjan, K. L. Pey, C. H. Tung, L. J. Tang, D. S. Ang, G. Groeseneken, S. De Gendt, and L. K. Bera, “Breakdown-induced thermochemical reactions in HfO2 high-/poly-silicon gate stacks”, Applied Physics Letters, vol. 87, no. 24, art. no. 242907, Dec. 2005.